The present disclosure relates to semiconductor structures and methods of fabricating the same. More particularly, the present disclosure relates to junction field effect transistors (JFETs) that are processed on thin single crystalline semiconductor substrates using mainstream large area deposition techniques.
Low-cost large-area processing is highly desirable for applications in large-area electronics such as the fabrication of thin-film transistor (TFT) backplanes for active-matrix displays. However, large-area deposition techniques are typically suited for growing non-crystalline or poly-crystalline materials resulting in a device performance which is inferior to that of single-crystalline materials. Processing single-crystalline devices typically requires a CMOS foundry which is too expensive for large area electronics and displays.